v0.11.1 Fix various issues due to the changes of the 0.11.1 - Fix clock signals pulling through components (sub component to toplevel) - Fix noRegisterAsLatch phases. Also this phase is applied to all none vital signals, even if that wasn't specified, to be more user friendly. - Fix cases when a clock is defined as an component output but is also used in the same component to drive registers - Better autoconnect <> implementation with better error reports