x86, amd-nb: Cleanup AMD northbridge caching code
Support more than just the "Misc Control" part of the northbridges. Support more flags by turning "gart_supported" into a single bit flag that is stored in a flags member. Clean up related code by using a set of functions (amd_nb_num(), amd_nb_has_feature() and node_to_amd_nb()) instead of accessing the NB data structures directly. Reorder the initialization code and put the GART flush words caching in a separate function. Signed-off-by:Hans Rosenfeld <hans.rosenfeld@amd.com> Signed-off-by:
Borislav Petkov <borislav.petkov@amd.com>
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- arch/x86/include/asm/amd_nb.h 25 additions, 9 deletionsarch/x86/include/asm/amd_nb.h
- arch/x86/kernel/amd_nb.c 62 additions, 47 deletionsarch/x86/kernel/amd_nb.c
- arch/x86/kernel/cpu/intel_cacheinfo.c 3 additions, 3 deletionsarch/x86/kernel/cpu/intel_cacheinfo.c
- arch/x86/kernel/pci-gart_64.c 12 additions, 12 deletionsarch/x86/kernel/pci-gart_64.c
- drivers/char/agp/amd64-agp.c 14 additions, 15 deletionsdrivers/char/agp/amd64-agp.c
- drivers/edac/amd64_edac.c 2 additions, 2 deletionsdrivers/edac/amd64_edac.c
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