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Commit a8274e41 authored by Valentin Schneider's avatar Valentin Schneider Committed by Yang Yingliang
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irqchip/gic-v2, v3: Prevent SW resends entirely


mainline inclusion
from mainline-5.10
commit 1b57d91b
category: bugfix
bugzilla: NA
CVE: NA

-------------------------------------------------

The GIC irqchips can now use a HW resend when a retrigger is invoked by
check_irq_resend(). However, should the HW resend fail, check_irq_resend()
will still attempt to trigger a SW resend, which is still a bad idea for
the GICs.

Prevent this from happening by setting IRQD_HANDLE_ENFORCE_IRQCTX on all
GIC IRQs. Technically per-cpu IRQs do not need this, as their flow handlers
never set IRQS_PENDING, but this aligns all IRQs wrt context enforcement:
this also forces all GIC IRQ handling to happen in IRQ context (as defined
by in_irq()).

Signed-off-by: default avatarValentin Schneider <valentin.schneider@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200730170321.31228-3-valentin.schneider@arm.com


Signed-off-by: default avatarLiao Chang <liaochang1@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parent 76704c53
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