xhci: fix issue of cross page boundary in TRB prefetch
zhaoxin inclusion category: feature bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=19 CVE: NA ---------------------------------------------------------------- On some Zhaoxin platforms, xHCI will prefetch TRB for performance improvement. However this TRB prefetch mechanism may cross page boundary, which may access memory not belong to xHCI. In order to fix this issue, using two pages for TRB allocate and only the first page will be used. The patch is scheduled to be submitted to the kernel mainline in 2021. Signed-off-by:LeoLiu-oc <LeoLiu-oc@zhaoxin.com> Reviewed-by:
Hanjun Guo <guohanjun@huawei.com> Reviewed-by:
LeoLiu-oc <LeoLiu-oc@zhaoxin.com> Conflicts: drivers/usb/host/xhci.h for XHCI_ZHAOXIN_TRB_FETCH drivers/usb/host/xhci.c for xhci_pci_quirks [Cheng Jian: adjust context] Signed-off-by:
Cheng Jian <cj.chengjian@huawei.com>
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