Skip to content
Snippets Groups Projects
Commit 46bbb3dc authored by LeoLiu-oc's avatar LeoLiu-oc Committed by Cheng Jian
Browse files

xhci: fix issue of cross page boundary in TRB prefetch

zhaoxin inclusion
category: feature
bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=19


CVE: NA

----------------------------------------------------------------

On some Zhaoxin platforms, xHCI will prefetch TRB for performance
improvement. However this TRB prefetch mechanism may cross page boundary,
which may access memory not belong to xHCI. In order to fix this issue,
using two pages for TRB allocate and only the first page will be used.

The patch is scheduled to be submitted to the kernel mainline in 2021.

Signed-off-by: default avatarLeoLiu-oc <LeoLiu-oc@zhaoxin.com>
Reviewed-by: default avatarHanjun Guo <guohanjun@huawei.com>
Reviewed-by: default avatarLeoLiu-oc <LeoLiu-oc@zhaoxin.com>
Conflicts:
        drivers/usb/host/xhci.h for XHCI_ZHAOXIN_TRB_FETCH
        drivers/usb/host/xhci.c for xhci_pci_quirks
[Cheng Jian: adjust context]
Signed-off-by: default avatarCheng Jian <cj.chengjian@huawei.com>
parent 2eac5f28
No related branches found
No related tags found
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment